1. Jiang, Shuyan, et al. "Optimizing dynamic mapping techniques for on-line NoC test." 23rd Asia and South PacificDesign Automation Conference (ASP-DAC). IEEE, 2018.
2. Huang, Letian, et al. "A lifetime-aware mapping algorithm to extend MTTF of networks-on-chip." 23rd Asia and South PacificDesign Automation Conference (ASP-DAC). IEEE, 2018.
3. Jiang, Shuyan, et al. "A fault-aware low-power-dissipation dynamic mapping algorithm based on NoC." Electrical Machines and Systems (ICEMS), 2017 20th International Conference on. IEEE, 2017.
4. Jiang, S. Y., et al. "A fault-tolerant routing algorithm for NoC based on 2D Mesh." Information Science and Electronic Engineering. CRC Press, 2016. 49-54.
5. Jiang, S. Y., et al.“Low latency routing algorithm simulation and hardware verification of NoC.” Electronic Engineering and Information Science - Proceedings of the 2015 International Conference on Electronic Engineering and Information Science, ICEEIS 2015, p 251-253.